材料科学
光电子学
原子层沉积
栅极电介质
电介质
晶体管
阈值电压
退火(玻璃)
高-κ电介质
纳米技术
图层(电子)
电压
电气工程
复合材料
工程类
作者
Yu Pan,Kunpeng Jia,Kailiang Huang,Zhenhua Wu,Guobin Bai,Jiahan Yu,Zhaohao Zhang,Qingzhu Zhang,Huaxiang Yin
出处
期刊:Nanotechnology
[IOP Publishing]
日期:2018-12-18
卷期号:30 (9): 095202-095202
被引量:50
标识
DOI:10.1088/1361-6528/aaf956
摘要
In this paper, a near-ideal subthreshold swing MoS2 back-gate transistor with an optimized ultrathin HfO2 dielectric layer is reported with detailed physical and electrical characteristics analyses. Ultrathin (10 nm) HfO2 films created by atomic-layer deposition (ALD) at a low temperature with rapid-thermal annealing (RTA) at different temperatures from 200 °C to 800 °C have a great effect on the electrical characteristics, such as the subthreshold swing (SS), on-to-off current (I ON/I OFF) ratio, etc, of the MoS2 devices. Physical examinations are performed, including x-ray diffraction, atomic force microscopy, and electrical experiments of metal-oxide-semiconductor capacitance-voltage. The results demonstrate a strong correlation between the HfO2 dielectric RTA temperature and the film characteristics, such as film density, crystallization degree, grain size and surface states, inducing a variation in the electrical parameters, such as the leakage, D it, equivalent oxide thickness, SS, and I ON, as well as I ON/I OFF of the MoS2 field effect transistors with the same channel materials and fabrication methods. With a balance between the crystallization degree and the surface state, the ultrathin (10 nm) HfO2 gate dielectric RTA at 500 °C is demonstrated to have the best performance with a field effect mobility of 40 cm2 V-1 s-1 and the lowest SS of 77.6 mV-1 decade, which are superior to those of the control samples at other temperatures. The excellent transistor results with an optimized industry-based HfO2 ALD and RTA process provide a promising approach for MoS2 applications into the scaling of the nanoscale CMOS process.
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