电子线路
位(键)
计算机科学
方案(数学)
容错
模块化设计
工程类
计算机网络
分布式计算
电气工程
数学
操作系统
数学分析
作者
Hari Mohan Gaur,Ashutosh Kumar Singh,Anand Mohan,Masahiro Fujita,Dhiraj K. Pradhan
出处
期刊:IEEE design & test
[Institute of Electrical and Electronics Engineers]
日期:2020-07-03
卷期号:38 (2): 89-96
被引量:6
标识
DOI:10.1109/mdat.2020.3006808
摘要
This article introduces redundant design approaches for reversible circuits that have the ability to detect and tolerate single-bit fault without the need of conventional voting scheme. Experiments preformed show that the proposed scheme reduces the gate cost on average with up to 28% as compared with tri-modular redundant circuits.
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