A fourth-order single-bit switched-capacitor sigma-delta modulator for distributed sensor applications

In this paper we present a switched-capacitor sigma-delta modulator for high resolution applications. In particular this sigma-delta modulator is well suited for distributed sensor networks. The circuit, implemented in a double-poly, double-metal 0.6 /spl mu/m CMOS technology, is based on a 4th-order single-loop architecture with a sampling frequency of 256 kHz. The chip consumes 50 mW from a single 5 V supply and achieves a signal-to-noise ratio of 104.9 dB over a bandwidth of 400 Hz, corresponding to a resolution of 17.1 bits.