量子隧道
阈下传导
材料科学
阈下斜率
光电子学
电子工程
阈值电压
绝缘体上的硅
半导体器件建模
电压
MOSFET
逻辑门
表征(材料科学)
电气工程
晶体管
工程类
纳米技术
硅
CMOS芯片
作者
Suyash Pati Tripathi,Shai Bonen,A. Bharadwaj,T. Jager,Claudia Nastase,S. Iordănescu,George Boldeiu,M. Pasteanu,Alexandra Nicoloiu,Ioana Zdru,A. Müller,Sorin P. Voinigescu
标识
DOI:10.1109/jeds.2022.3176205
摘要
A compact analytical model is proposed along with a parameter extraction methodology to accurately capture the steady-state (DC) sequential tunneling current observed in the subthreshold region of the transfer $I_{DS}-V_{GS}$ characteristics of MOSFETs at cryogenic temperatures. The model is shown to match measurements of $p$ -MOSFETs and $n$ -MOSFETs manufactured in a commercial 22nm FDSOI foundry technology, with reasonable accuracy across bias conditions and temperature (2 K - 50 K). Furthermore, the extracted model parameters are used to analyze the impact of the gate and drain voltages and of layout geometry on the device characteristics.
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