Investigation of Device Interactions Between Two MOSFETs in Si CMOS

Experimental works about the device interactions between nMOS and pMOS in bulk Si CMOS were performed. In the bulk Si CMOS, in the case that the distance between two MOSFETs is not enough, it is important to consider the risk of the device interactions between nMOS and pMOS. In this work, we fabricated bulk Si CMOS, in which the distance between pMOS and nMOS can be variable. And we observed the characteristics of the device operation by using fabricated CMOS under the dc bias condition. In this research, we focused on the leakage current between two MOSFETs in CMOS inverter depending on the distance between two MOSFETs, applied voltage and temperature. Experimental results showed that our fabricated CMOS shows quite small leakage current and the leakage current is less than 1% compared to CMOS on state current even with small distance between two MOSFETs at the high voltage condition and the high temperature condition.