PMOS逻辑
NMOS逻辑
材料科学
光电子学
绝缘体上的硅
MOSFET
浅沟隔离
压力(语言学)
复合材料
图层(电子)
电气工程
沟槽
晶体管
电压
硅
语言学
哲学
工程类
作者
Byung-eun Yun,YK Hong,Young-sang Jung,Youngmok Kim,Jin‐Hong Park,Kyung-Lyong Kang,Jun-Gu Kang,Jong-Ho Kim
出处
期刊:Meeting abstracts
[Institute of Physics]
日期:2020-11-23
卷期号:MA2020-02 (68): 3612-3612
标识
DOI:10.1149/ma2020-02683612mtgabs
摘要
The effects of a stressor nitride oxide layer on device performance and reliability are investigated. Impact of tensile and compressive stress contact etch stop layer (CESL) and shallow trench isolation(STI) mechanical stress on performance and mobility enhancement of <110>/(100) Fully Depleted Sillicon On Insulator(FD-SOI) MOSFETs (ultrathin film, short length, metal-gate/high-K stack, thin BOX) were studied in detail. By thoroughly evaluating their impact on current, mobility, and threshold voltage, the performance gain of CESL is quantified at CMOS with mobility enhancement identified as the major source. It is also experimentally demonstrated that advantageous Length of Diffusion. In the Compress CESL(cCESL) strain , PMOS show 34% performance enhancement with LOD increase 0.1nm to 1um. On the ather hand, NMOS show 3.41%. In the Tensile CESL(tCESL) strain , NMOS show 11.72% performance enhancement with same LOD condition. On the ather hand , PMOS has changed 3.72%.
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