期刊:Electronics Letters [Institution of Engineering and Technology] 日期:1999-10-28卷期号:35 (22): 1947-1948被引量:1
标识
DOI:10.1049/el:19991326
摘要
A frequency compensated 5 V CMOS voltage buffer is proposed. It is possible to increase the bandwidth of the buffer substantially using only one grounded capacitor which introduces a zero into the small-signal transfer function. Simulations based on a 2 µm n-well CMOS process have indicated that the 3 dB frequency of the buffer is beyond 700 MHz.