Vertical GaN/InGaN/GaN heterostructure tunnel field-effect transistor: DC and analog/RF performance

This work reports an [Formula: see text]-type GaN/InGaN/GaN heterostructure vertical double-gate tunnel field-effect transistor (VTFET) using exhaustive calibrated simulation for the first time. Investigation has been done for the proposed structure by including a polarization layer of InGaN near the source-channel junction. From the analysis, it has been observed that after the introduction of polarization layer near the source-channel interface, drain current increases due to the increase in charge concentration (2DEG) near the interface due to inter-band tunneling. Value of 2DEG concentration achieved post introducing the polarization layer is [Formula: see text] [Formula: see text]. The reported structure is optimized using parametric sweep optimization technique. Here, a detailed dc and analog/RF performance estimation has been done for the structure with heterostructure. In-depth sensitivity analysis has been done for the structure with the polarization layer. It is reported that the structure with HfO 2 as the dielectric material with [Formula: see text] of 2 nm and with gate metal work function of 5.8 eV gives the optimum performance at 300 K. Further, it demonstrates high cutoff frequency ([Formula: see text] and gain bandwidth product (GBW) as 1000 GHz and 300 GHz, respectively. Hence, the reported structure is a better alternative for high-power steep switching analog and RF applications.