结温
材料科学
半导体器件
功率半导体器件
冷却液
半导体
热阻
电源模块
集成电路封装
机械工程
功率(物理)
热的
压力(语言学)
电子工程
光电子学
电气工程
集成电路
复合材料
工程类
电压
哲学
气象学
物理
量子力学
语言学
图层(电子)
作者
Niko Pavliček,Chunlei Liu,Usama Qayyum
标识
DOI:10.1109/estc55720.2022.9939496
摘要
Embedding power semiconductor devices in prepackages facilitates low-inductive power semiconductor module designs with superior thermal performance and reliability. As thermal, electrical, and mechanical material properties must be considered, the design of power semiconductor packages is a multi-objective optimization problem. On the one hand, thermomechanical stress formation due to differences in the coefficients of thermal expansion of components must be minimized to achieve long lifetimes. On the other hand, the thermal resistance between junction and coolant must be minimized to efficiently cool the semiconductor devices during operation. We present a parametric study of pre-package designs considering both thermal and mechanical properties. Our study builds up on previous investigations in which we have demonstrated how patterning and CTE-matching of contacts can efficiently reduce thermomechanical stresses in power semiconductor pre-packages. In this work, we also consider the heat transfer from junction to coolant in single- and double-side cooled variants of power semiconductor module based on prepackaged SiC MOSFETs.
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