Prediction of Electromigration Induced Void and Hillock for IC Interconnect Structures

This paper investigates the electromigration (EM) induced void and hillock generation in IC interconnect structures. The driving force for electromigration induced failure considered here includes the electron wind force, stress gradient, temperature gradient, as well as the atomic density gradient, which were neglected in many of the existing studies on eletromigration. The comparison of void/hillock formation and the time to failure (TTF) life through numerical example of the SWEAT structure with the measurement results are studied and discussed.