Current problems of high energy application in memory device fabrication

We have estimated the problems of high energy application to memory device fabrication from the point of wafer crystalline structure. Following a series of experiments, we have found the different implantation damage induced by the variations of off-cut and azimuth angle of wafer and show that the difference can be reduced if the tilted wafer is adopted. The use of off-angle wafer also minimizes the shadowing effect depending on the tilt angle of implantation because there is no need to use the tilting method in ion implantation process.