Historical Perspective of System in Package (SiP)

"Moore Stress" calls for technology and architecture innovation, and System in Package (SiP) is critical to address the challenge. System in Package is a generalization of System on Chip. As such, SiP is a giant chip rather than a miniaturized Printed Circuit Board (PCB). SiP using Wafer Level Package (WLP) enables performance efficient and cost effective integration of DRAM and logic. SiP with Integrated Passive Devices (IPD) provides high quality and low energy platforms for mixed signal and RF circuits. Billions of chips are shipped each year using SiP due to ultra small form factor with very low power consumption for smartphones, smart wearable devices such as smart watches, and Internet of Things (IoT). From editing the book “Multichip Modules” in 1992 to providing leadership for the IEEE Multi-Chip Module Conference (MCMC) from 1992 to 1997, Professor Ernest Kuh made profound contributions to the field of System in Package, particularly in design, analytical methods, and extensively toward CAD tools for SiP. His influence and vision led to the special session on “System in Package” at ASP-DAC in 2000, where the term “System in Package (SiP)” was used in a conference and in publications for the first time and is now widely used in the industry.