Effect of double-side cooling packaging on the properties of dual-base-island packaging

This study is based on a highly integrated Dual-Base-Island packaging product, where a clip structure is implemented on the device top to form a double-sided heat dissipation configuration. By integrating thermodynamic simulation analysis results from Ansys Workbench with experimental data, we evaluate the impact of double-sided cooling technology on key thermal and electrical parameters including heat dissipation efficiency, thermal resistance, and RDS(on). Thermal simulation results demonstrate that the Dual-Base-Island double-sided heat dissipation structure exhibits more uniform temperature distribution, with the maximum surface temperature (163.34 °C) located at the clip region - representing a reduction of 12.29 °C compared to the single-sided configuration. High thermal flux regions are concentrated at the clip-to-leadframe bonding interface, effectively establishing dual thermal conduction paths. For internal device characterization, the chip exhibits maximum von Mises stress concentration at the clip contact interface (469.55 MPa). Experimental measurements show that the RDS(on) values of the double-sided cooling device are consistently lower than those of the single-sided counterpart under all tested ambient temperatures, with the differential diminishing as environmental temperature increases. Notably, the Dual-Base-Island packaged device achieves a junction-to-case thermal resistance (Rth(ch-tp)) of 0.95 °C/W, representing an 83.84% reduction, while demonstrating a 20.45% enhancement in maximum power dissipation (2.045 W). These findings conclusively validate that the double-sided heat dissipation packaging technology significantly improves both thermal management efficiency and electrical performance in power semiconductor devices.