光电子学
材料科学
阈下摆动
排水诱导屏障降低
晶体管
量子隧道
纳米线
MOSFET
阈下传导
绝缘体上的硅
泄漏(经济)
绝缘体(电)
阈下斜率
硅
纳米技术
场效应晶体管
电气工程
电压
工程类
经济
宏观经济学
作者
Akshaya Anand,Archana R Nair,Vaishnavi Sreekumar,Viswas Sadasivan,V. Ramakrishnan
标识
DOI:10.1016/j.matpr.2022.05.414
摘要
A comparative study of the double gate MOSFET (DG MOSFET), vertical silicon gate all around nanowire (GAA-NW) tunneling field effect transistor (TFET) and SiGe-source HfO2-insulator GAA-NW TFET is presented to prove that the last can outperform the others in terms of high performance, energy efficiency, ultra-low power, high on-chip density and gate controllability. Scaling of transistors beyond FinFET is generally possible with the help of TFET while reducing the subthreshold swing (SS), short channel effects (SCE) and drain induced barrier leakage (DIBL). But the ambipolarity in Si TFET causes high Ioff current. Hence, here, a vertical Si-source SiO2-insulator GAA-NW TFET is studied to provide high Ion current, subthreshold swing less than 30 mV/decade and DIBL less than 20 mV/V, so that the channel length can be made independent of the footprint. These properties are further enhanced by the use of SiGe source and HfO2 insulator.
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