Laser annealing applications for semiconductor devices manufacturing

Abstract In the history of semiconductor device fabrication, annealing is one of the critical process steps used to achieve the targeted device performance. Thermal budget requirements in most semiconductor manufacturing process steps have always followed a downward trend through either a reduction of the time spent at high temperature or a lowering of the peak temperature. This was driven at first by the traditional shrinking of structure dimensions which naturally required reducing species diffusion. From the last decade, performance improvements started to be driven essentially by the introduction of new materials (e.g., SiGe alloy, high-k/metal gate stack) and device architecture changes (e.g., 2D planar to 3D FinFET). The current development trend is leading toward 3D integrated circuits to answer the growing demand for increased functionality and performance. Such new drivers impact the whole supply chain, and low thermal budget solutions are now key to manage local strain and stress; limit species diffusion and interdiffusion; and control layer deposition, etch, and quality. In this regard, for a wide variety of applications, laser exhibits superior performance and a more cost-effective solution than nonlaser technologies. Moreover, laser provides flexible, higher throughput to process various materials. Trends regarding laser annealing are expected to experience fast growth, driven by 3D integration applications. In this chapter, we will review the most promising applications for laser annealing from the recent published literature with a focus on realistic candidates for integration in a high-volume semiconductor manufacturing flow, based on electrically relevant results. The first section will be dedicated to power devices, the second section to CMOS logic and 3D integration, and the final section to memory.