Controlling the fixed negative charge formation in Si/high-k interfaces

High-$k$ dielectrics ${\mathrm{Al}}_{2}{\mathrm{O}}_{3}$ and ${\mathrm{HfO}}_{2}$ are widely used in combination with Si to produce electronic components and solar cells. A negative fixed charge is known to appear at Si/high-$k$ material interface after high-temperature annealing, yet the formation mechanism of the negative charge is poorly understood. In this work, we investigate the parameters affecting the charge formation to provide a better understanding and control of the charge in deposition and postprocessing steps. We observe negative charge formation in the interface after annealing by capacitance-voltage measurement. We demonstrate the effects of annealing temperature and high-$k$ film thickness on the charge formation. We further discuss the mechanism of the charge formation and present results supporting one recently suggested mechanism explaining the negative charge as an acceptor state in the interface. We observe a structural modification of the interface produced by annealing with photoelectron spectroscopy as a core-level shift in ${\mathrm{SiO}}_{2}$ binding energy. We investigate the electrostatic potential and electron distribution in the interface by ab initio calculations to understand the effect of the structural modification on the electronic structure of the interface.