神经形态工程学
材料科学
噪音(视频)
晶体管
光电子学
加密
原子层沉积
电介质
电子工程
计算机科学
人为噪声
电压
瞬态(计算机编程)
压力(语言学)
图层(电子)
氧化物
阈值电压
降级(电信)
接口(物质)
逻辑门
电阻随机存取存储器
栅极电介质
硅
纳米技术
沉积(地质)
频道(广播)
电气工程
共形映射
作者
Jiawei Yang,Bingyan Wang,Bo He,Peng Chen,Haifeng Xu,Shanshan Jiang,Huanhuan Wei,Prof. Gang He
标识
DOI:10.1021/acs.jpclett.5c03934
摘要
Ultrathin neuromorphic transistors with sub-10 nm indium-gallium-zinc oxide (IGZO) channels and 20 nm Al2O3 gate dielectrics have been fabricated via low-temperature (250 °C) atomic layer deposition (ALD), achieving conformal interfaces critical for reliable synaptic functionality. Low-frequency noise analysis reveals that the ALD-derived atomically flat interface (γ = 0.934) generates tunable shallow-level defects, acting as transient trapping sites and forming a controllable 1/f noise source. The devices exhibit exceptional stability, with threshold voltage drift below 330 mV under 4500 s of bias/illumination stress and minimal variation (<10 mV) after 500 mechanical bending cycles. Leveraging these properties, we implement hybrid audio-digit labels for information concealment, achieving 89.58% recognition accuracy, and demonstrate a three-level image encryption system. This work provides a scalable, energy-efficient platform for back-end-of-line-compatible monolithic 3D memory integration, highlighting the interplay between defect engineering and interfacial dynamics in ultrathin oxide semiconductors.
科研通智能强力驱动
Strongly Powered by AbleSci AI