跨导
材料科学
逆变器
三元运算
光电子学
晶体管
逻辑门
电子线路
电压
电气工程
计算机科学
工程类
程序设计语言
作者
Hocheon Yoo,Sungmin On,Seon Baek Lee,Kilwon Cho,Jae‐Joon Kim
标识
DOI:10.1002/adma.201808265
摘要
Multivalued logic (MVL) computing could provide bit density beyond that of Boolean logic. Unlike conventional transistors, heterojunction transistors (H-TRs) exhibit negative transconductance (NTC) regions. Using the NTC characteristics of H-TRs, ternary inverters have recently been demonstrated. However, they have shown incomplete inverter characteristics; the output voltage (VOUT ) does not fully swing from VDD to GND . A new H-TR device structure that consists of a dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT) layer stacked on a PTCDI-C13 layer is presented. Due to the continuous DNTT layer from source to drain, the proposed device exhibits novel switching behavior: p-type off/p-type subthreshold region /NTC/ p-type on. As a result, it has a very high on/off current ratio (≈105 ) and exhibits NTC behavior. It is also demonstrated that an array of 36 of these H-TRs have 100% yield, a uniform on/off current ratio, and uniform NTC characteristics. Furthermore, the proposed ternary inverter exhibits full VDD -to-GND swing of VOUT with three distinct logic states. The proposed transistors and inverters exhibit hysteresis-free operation due to the use of a hydrophobic gate dielectric and encapsulating layers. Based on this, the transient operation of a ternary inverter circuit is demonstrated for the first time.
科研通智能强力驱动
Strongly Powered by AbleSci AI