A 3nm GAAFET Analog Assisted Digital LDO with High Current Density for Dynamic Voltage Scaling Mobile Applications

This paper presents an analog assisted digital LDO achieving high current density and fast response characteristic. A current comparator based control method enables over 10x ratio of digital current over analog current for high current density regardless of PVT condition. The proposed LDO in 3nm GAAFET CMOS technology demonstrated current density of 34.15A/mm ² and fast transient characteristic of 38mV droop at 1A/1ns load current condition.