门驱动器
薄膜晶体管
占空比
液晶显示器
晶体管
功率(物理)
计算机科学
电气工程
电子工程
工程类
材料科学
光电子学
电压
物理
纳米技术
量子力学
图层(电子)
作者
Guang‐Ting Zheng,Po‐Tsun Liu,Meng‐Chyi Wu,Li-Wei Chu,Meng‐Chuan Yang
标识
DOI:10.1109/jdt.2012.2225406
摘要
A new gate driver has been designed and fabricated by amorphous silicon (a-Si) technology. With utilizing four clock signals in the design of gate driver on array (GOA), the pull-up transistor has ability for both output charging and discharging, and layout size of the proposed gate driver can be narrowed for bezel panel application. Moreover, lower duty cycle of clock signals can decrease static power loss to further reduce the overall power consumption of the proposed gate driver. The scan direction of the proposed gate driver can be adjusted by switching two direct control signals to present the reversal display of image. The proposed gate driver has been successfully demonstrated in a 4.5-inch WVGA $({\hbox{480}}\times{\rm RGB}\times {\hbox{800}})$ TFT-LCD panel and passed reliability tests of the supporting foundry.
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