发射机
摇摆
CMOS芯片
电气工程
占空比
线性
电压
输出阻抗
电子工程
工程类
频道(广播)
机械工程
作者
Matteo Bassi,Francesco Radice,Melchiorre Bruccoleri,Simone Erba,Andrea Mazzanti
出处
期刊:IEEE Journal of Solid-state Circuits
[Institute of Electrical and Electronics Engineers]
日期:2016-09-01
卷期号:51 (11): 2702-2715
被引量:49
标识
DOI:10.1109/jssc.2016.2598223
摘要
Pushed by the ever-increasing demand of high-speed connectivity, next generation 400 Gb/s electrical links are targeting PAM-4 modulation to limit channel loss and preserve link budget. Compared to NRZ, a higher amplitude is desirable to counteract the 1/3 reduction of PAM-4 vertical eye opening. However, linearity is also key, and PAM-4 levels must be precisely spaced to preserve the horizontal eye opening advantage it has over NRZ. This paper presents a 45 Gb/s PAM-4 transmitter able to deliver a very large output swing with enhanced linearity and state-of-the-art efficiency. Built around a hybrid combination of current-mode and voltage-mode topologies, the driver is embedded into a 4-taps 5-bits feed-forward equalizer (FFE), and allows tuning the output impedance to ensure good source termination. Implemented in 28 nm CMOS FDSOI process, the full transmitter includes a half-rate serializer, duty-cycle correction circuit, >> 2 kV HBM ESD diodes, and delivers a full swing of 1.3 Vppd at 45 Gb/s, while drawing only 120 mA from 1 V supply. The power efficiency is ~ 2 times better than previously reported PAM-4 transmitters.
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