A 256 Gbps Heterogeneously Integrated Silicon Photonic Microring-based DWDM Receiver Suitable for In-Package Optical I/O

We present a 256 Gb/s (8$\lambda$*32 Gb/s/$\lambda$) 3D-integrated silicon photonic (SiPh) receiver suitable for integration in XPU/switch packages. The photonic IC (PIC) integrates a multi-wavelength laser, optical amplifier, and cascaded micro-ring resonators (MRRs) to implement dense wavelength division multiplexing (DWDM) with minimal footprint. The 28nm CMOS electronic IC includes eight SerDes channels, and PIC interface/control electronics. A dither-based thermal control unit tunes MRRs in the optical demux to align with the laser grid with sub-pm resolution. Measured results demonstrate BER<1e-12 when receiving 256 Gb/s DWDM input generated by MRRs modulating eight 200 GHz-spaced wavelengths. This is 2X higher aggregate bandwidth than previously published SiPh MRR-based receivers, with higher level of photonic integration.