Prevention of Cracking From RDL Stress and Dicing Defects in Glass Substrates

Glass substrates have outstanding electrical properties, tailorable coefficient of thermal expansion (CTE), high mechanical rigidity, availability in large and thin panel form, and smooth surface for fine line fabrication, and thus, have gained increased attention and interest in microelectronics industry since 2010. While thin glass packaging offers such a plethora of benefits, glass is a brittle material and thus is prone to failure when copper wiring and polymer layers are deposited on it. This experimental and theoretical work aims to understand the mechanics of glass cracking as a result of stress development from multilayer wiring, defect formation from panel dicing, and thermal cycling, then design a solution to prevent such cracks and demonstrate this solution. Dicing defects are simulated by adding a crack into the free edge of the glass and the energy available for crack propagation, G, is determined through a finite element based fracture mechanics approach. Moisture is well known to lower surface energy, resulting in a lower critical energy release rate for glass (GC) in the presence of moisture or water and, at the defect sizes measured, G reaches GC, indicating that the samples will crack while dicing in water. With thinner dielectric material, optimized dicing process, improved glass-polymer adhesion, and solder resist pullback, it is seen that glass cracking and glasspolymer delamination can be eliminated during dicing and subsequent thermal cycling.