纳米柱
制作
电介质
硅
蚀刻(微加工)
光学
材料科学
相(物质)
光电子学
扫描电子显微镜
黑硅
反应离子刻蚀
各向同性腐蚀
纳米技术
红外线的
生物医学中的光声成像
碳化硅
降级(电信)
表征(材料科学)
沉积(地质)
菲涅耳方程
接受角
作者
W. T. Chen,C. Kyle Renshaw
摘要
Dielectric metalenses provide compact, high-performance solutions for mid-wave infrared (MWIR) imaging, sensing, and beam-shaping, but their optical performance is highly sensitive to fabrication-induced geometric deviations. In particular, process-induced etch depth non-uniformities from reactive ion etching (RIE) lag distort the designed phase profile and degrade focusing efficiency. Here, we systematically investigate these effects in MWIR metalenses composed of silicon nanopillar (NP) and nanohole (NH) meta-atoms. Cross-sectional scanning electron microscopy (SEM) measurements were used to quantify depth–radius relationships for both geometries, capturing RIE lag behavior. These empirical models were integrated into fabrication-induced meta-atom phase libraries to reconstruct the fabricated phase profiles, and full-wave angular spectrum method (ASM) simulations were used to compare ideal and fabrication-constrained designs. Significant performance degradation was observed when depth variations were not accounted for; focusing efficiency decreased from 99.45% to 69.05% for NP metalenses and from 99.45% to 49.46% for NH metalenses. To address this, we developed a process-aware design methodology that includes etch depth non-uniformity during layout, enabling pre-compensation of phase errors. Simulations show this approach restored focusing efficiency to 99.18% for NP and 99.42% for NH designs, closely matching ideal performance. The results demonstrate that integrating empirical fabrication data into the metasurface design workflow can effectively mitigate process-induced errors, offering a practical route toward scalable, high-performance dielectric metalenses for MWIR and other spectral regimes.
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