Accurate SPICE models for CMOS analog radiation-hardness-by-design

A new accurate modeling technique based on conformal mapping provides SPICE models for edgeless field-effect transistors (FETs) with arbitrary gate geometries for analog radiation-hardness-by-design. Generated models are compared to data measured from FETs with annular and other geometries fabricated on TSMC 0.25 /spl mu/m and 0.18 /spl mu/m processes. Currents, output resistances and capacitances all typically agree to within 10% of measured data. Application of the model to alternative gate geometries useful for analog radiation hardened design is explored.