Tolerance to defective memristors in a neuromorphic learning circuit
作者
Chris Yakopcic,Raqibul Hasan,Tarek M. Taha
标识
DOI:10.1109/naecon.2014.7045810
摘要
This paper describes a memristor based neuromorphic circuit that is capable of learning. Target memristors within the crossbar circuit were set to be stuck in either high or low resistance states to observe fault tolerance within the memristor crossbar. The simulations are carried out in SPICE using a detailed memristor model so that the crossbar is simulated as accurately as possible. In some cases the circuit was able to successfully learn when half of the memristors in the crossbar were set to be defective. Due to additional bias circuitry, this neuromorphic memristive learning circuit appears to be more tolerant to error than alternative designs.