摘要
Abstract A simulation study of P3HT:PCBM-based organic solar cells (OSCs) is presented, beginning with device calibration using experimentally reported J-V and EQE characteristics. The calibrated model is benchmarked against multiple reported device structures, and deviations are analyzed in terms of material properties, device architecture, and resistive losses. A detailed investigation of series and shunt resistances identifies optimal values of 20 Ω and 11 kΩ cm 2 , respectively, resulting a PCE of 5.68%. The effects of various hole transport layers (HTLs) and electron transport layers (ETLs) are then systematically evaluated. Among the HTLs (NiO, CuI, MoO 3 , P3HT, and PEDOT:PSS), CuI results the highest enhancement in V OC , FF , and overall PCE due to its favorable energy-level alignment and minimal anode energetic off-set ( ∆ E A ) . Similarly, ZnSe emerges as the most efficient ETL among the nine candidates (ZnSe, C60, CuO, PC60BM, ZnO, TiO 2 , WS 2 , SnO 2 , and WO 3 ) considered, offering superior V OC and J SC owing to its low optical absorption and negligible cathode off-set ( ∆ E C ) . The CuI/ZnSe combination delivers a significantly improved PCE of 8.19%. Further optimization of device geometry reveals that an active-layer thickness of 200 nm, coupled with 5 nm CuI (HTL), 60 nm ZnO (ETL), 10 nm ITO (anode), and 100 nm Al (cathode), provides an optimal balance between absorption, charge transport, and recombination, resulting in a PCE of 8.75%. Finally, mobility optimization using an electron mobility of 1 × 10 −6 m 2 ·V −1 ·s −1 with a correspondingly balanced hole mobility enhances charge extraction and suppresses recombination, achieving a maximum PCE of 10.35%. Overall, this study demonstrates that a combined strategy involving interfacial layer selection, device-geometry tuning, and mobility engineering is crucial for maximizing the performance of P3HT:PCBM-based OSCs.