神经形态工程学
突触重量
MNIST数据库
非易失性存储器
晶体管
材料科学
铁电性
范德瓦尔斯力
电导
计算机科学
电子工程
人工神经网络
光电子学
电气工程
电压
物理
人工智能
凝聚态物理
工程类
电介质
分子
量子力学
作者
Zhongwang Wang,Xuefan Zhou,Xiaochi Liu,Aocheng Qiu,Caifang Gao,Yahua Yuan,Yumei Jing,Dou Zhang,Wenwu Li,Hang Luo,Junhao Chu,Jian Sun
出处
期刊:Chip
[Elsevier BV]
日期:2023-03-21
卷期号:2 (2): 100044-100044
被引量:23
标识
DOI:10.1016/j.chip.2023.100044
摘要
State number, operation power, dynamic range and conductance weight update linearity are key synaptic device performance metrics for high-accuracy and low-power-consumption neuromorphic computing in hardware. However, high linearity and low power consumption couldn't be simultaneously achieved by most of the reported synaptic devices, which limits the performance of the hardware. This work demonstrates van der Waals (vdW) stacked ferroelectric field-effect transistors (FeFET) with single-crystalline ferroelectric nanoflakes. Ferroelectrics are of fine vdW interface and partial polarization switching of multi-domains under electric field pulses, which makes the FeFETs exhibit multi-state memory characteristics and excellent synaptic plasticity. They also exhibit a desired linear conductance weight update with 128 conductance states, a sufficiently high dynamic range of Gmax/Gmin > 120, and a low power consumption of 10 fJ/spike using identical pulses. Based on such an all-round device, a two-layer artificial neural network was built to conduct Modified National Institute of Standards and Technology (MNIST) digital numbers and electrocardiogram (ECG) pattern-recognition simulations, with the high accuracies reaching 97.6% and 92.4%, respectively. The remarkable performance demonstrates that vdW-FeFET is of obvious advantages in high-precision neuromorphic computing applications.
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